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TDA7405 Datasheet, PDF (39/56 Pages) STMicroelectronics – EQUALIZER CARRADIO SIGNAL PROCESSOR
TDA7405
6 I²C BUS INTERFACE
6.1 Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (the LSB bit determines read / write transmission)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 ... DATA n
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 1 1 0 R/W ACK C AZ I A A A A A ACK
S = Start
R/W ="0" -> Receive-Mode (Chip could be programmed by µP)
"1" -> Transmission-Mode (Data could be received by µP)
ACK = Acknowledge
P = Stop
MAX CLOCK SPEED 500kbits/s
DATA
6.1.1 Auto increment
If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled.
6.1.2 TRANSMITTED DATA (send mode)
LSB
ACK P
MSB
LSB
X X X X X P ST SM
SM = Soft mute activated
ST = Stereo
P = Pause
X = Not Used
The transmitted data is automatically updated after each ACK. Transmission can be repeated without new chi-
paddress.
6.1.3 Reset Condition
A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that the following data is written
automatically into the registers of all subaddresses :
MSB
LSB
1
1
1
1
1
1
1
0
The programming after POR is marked bold-face / underlined in the programming tables.
With this programming all the outputs are muted to VREF (VOUT= VDD/2).
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