PM6675S Datasheet, PDF (37/53 Pages) STMicroelectronics – High efficiency step-down controller with embedded 2 A LDO regulator

PM6675S
Device description
Figure 46. Maximum LDO source able output current vs input voltage
2.2
2.0
VOUT=1.05V
1.8
VOUT=1.2V
1.6
VOUT=1.5V
VOUT=1.8V
1.4
VOUT=2.0V
1.2
VOUT=2.2V
VOUT=2.5V
1.0
VOUT=3.3V
0.8
0.6
0.4
0.2
0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VLIN [V]
7.2.2
7.2.3
7.2.4
LDO section soft-start
The LDO section soft-start is performed by clamping the current limit. During startup, the
LDO current limit voltage is set to 1A and the output voltage increases linearly. When the
output voltage rises above 90 % of the nominal value, the current limit is released to 2 A
according to the LILIM pin setting. At the end of the ramp-up phase of the soft-start, the LPG
signal is masked for about 100 µs in order to ignore dynamic overshoot on the feedback pin.
LDO section power good signal
The LPG pin is an open drain output used to monitor the LDO output voltage through LFB
pin.
The LPG signal is held low if the output voltage drops 10 % below or rises 10 % above the
nominal regulated value. The LPG output can sink current up to 4 mA.
LDO section output discharge
Active soft-end of the LDO output occurs when the LEN (Linear ENable) is forced low. When
the LDO section is turned off, an internal 25 Ω resistor, directly connected to the LOUT pin,
discharges the output.
Figure 47. LDO section soft-end
VLDO
Resistive Discharge
LEN
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