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M950X0-W Datasheet, PDF (35/46 Pages) STMicroelectronics – Compatible with SPI bus serial interface
M950x0-W M950x0-R M950x0-DF
DC and AC parameters
Table 18. AC characteristics (M950x0-W, device grade 6)(1)
Test conditions specified in Table 9 and Table 12
Symbol Alt.
Parameter
(2)
VCC = 2.5 to 5.5 V VCC = 4.5 to 5.5 V Unit
Min. Max. Min. Max.
fC
fSCK Clock frequency
D.C.
10
D.C.
20 MHz
tSLCH tCSS1 S active setup time
30
-
15
-
ns
tSHCH tCSS2 S not active setup time
30
-
15
-
ns
tSHSL
tCS S deselect time
40
-
20
-
ns
tCHSH
tCSH S active hold time
30
-
15
-
ns
tCHSL
tCH(3)
tCL(3)
tCLCH(4)
tCHCL(4)
- S not active hold time
tCLH Clock high time
tCLL Clock low time
tRC Clock rise time
tFC Clock fall time
30
-
15
-
ns
40
-
20
-
ns
40
-
20
-
ns
-
2
-
2
µs
-
2
-
2
µs
tDVCH
tDSU Data in setup time
10
-
5
-
ns
tCHDX
tDH Data in hold time
10
-
10
-
ns
tHHCH
- Clock low hold time after HOLD not active
30
-
15
-
ns
tHLCH
- Clock low hold time after HOLD active
30
-
15
-
ns
tCLHL
- Clock low set-up time before HOLD active
0
-
0
-
ns
tCLHH
- Clock low set-up time before HOLD not active 0
-
0
ns
tSHQZ(4) tDIS Output disable time
-
40
-
20
ns
tCLQV(5)
tV Clock low to output valid
-
40
-
20
ns
tCLQX
tQLQH(4)
tQHQL(4)
tHO Output hold time
tRO Output rise time
tFO Output fall time
0
-
0
-
ns
-
40
-
20
ns
-
40
-
20
ns
tHHQV
tHLQZ(4)
tLZ HOLD high to output valid
tHZ HOLD low to output high-Z
-
40
-
20
ns
-
40
-
20
ns
tW
tWC Write time
-
5
-
5
ms
1. The timing values described in this table are recommended for new designs.
2. Only for devices identified by process letter K.
3. tCH + tCL must never be lower than the shortest possible clock period, 1/fC(max).
4. Characterized only, not tested in production.
5.
teCqLuQaVl
must
to (or
bgerecaotemrptahtaibnl)etCwLitQhVt;CinL
(aclllooctkhelorwcatismees,):tCifLthmeuSstPbI ebuesqumaal stote(roorfgferresaateRr tehaadn)setCtuLQpVti+mtSeUt.SU
=
0
ns,
tCL
can
be
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