STM8AF6268 Datasheet, PDF (32/89 Pages) STMicroelectronics – Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Memory and register map
STM8AF61xx, STM8AF62xx
Table 13. General hardware register map (continued)
Address
Block
Register label
Register name
0x00 50C3
0x00 50C4
0x00 50C5
0x00 50C6
0x00 50C7
0x00 50C8
0x00 50C9
0x00 50CA
0x00 50CB
0x00 50CC
0x00 50CD
CLK_CMSR
Clock master status register
CLK_SWR
Clock master switch register
CLK_SWCR
Clock switch control register
CLK_CKDIVR
Clock divider register
CLK
CLK_PCKENR1 Peripheral clock gating register 1
CLK_CSSR
Clock security system register
CLK_CCOR
Configurable clock control register
CLK_PCKENR2 Peripheral clock gating register 2
Reserved area (1 byte)
CLK_HSITRIMR HSI clock calibration trimming register
CLK
CLK_SWIMCCR
SWIM clock control register
0x00 50CE
to 0x00 50D0
0x00 50D1
0x00 50D2
0x00 50D3 to
0x00 50DF
0x00 50E0
0x00 50E1
0x00 50E2
0x00 50E3 to
0x00 50EF
0x00 50F0
WWDG
IWDG
0x00 50F1
AWU
0x00 50F2
0x00 50F3
0x00 50F4 to
0x00 50FF
BEEP
Reserved area (3 bytes)
WWDG_CR
WWDG_WR
WWDG control register
WWDR window register
Reserved area (13 bytes)
IWDG_KR
IWDG_PR
IWDG_RLR
IWDG key register
IWDG prescaler register
IWDG reload register
Reserved area (13 bytes)
AWU_CSR1
AWU_APR
AWU_TBR
BEEP_CSR
AWU control/status register 1
AWU asynchronous prescaler buffer
register
AWU timebase selection register
BEEP control/status register
Reserved area (12 bytes)
Reset
status
0xE1
0xE1
0xXX
0x18
0xFF
0x00
0x00
0xFF
0x00
0bXXXX
XXX0
0x7F
0x7F
0xXX⁽²⁾
0x00
0xFF
0x00
0x3F
0x00
0x1F
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Doc ID 14952 Rev 6