XRAG2 Datasheet, PDF (3/8 Pages) STMicroelectronics – UHF, EPCglobal Class-1 Generation-2, Contactless Memory Chip 432 bit with Multi-session Protocol, Anti-collision and Kill functions

XRAG2
2 XRAG2 memory mapping
2 XRAG2 memory mapping
The XRAG2 is a 432-bit memory divided into a 3-memory bank (without USER memory) or
4-memory bank (with USER memory) configuration. Each bank is organized into 16-bit Words.
The reader can read part or all of each memory bank in single or multiple groups of 16-bit
Words. Use the WRITE command to write to device memory using 16-bit Words. The
BLOCKWRITE command enables readers to write up to four 16-bit Words to device memory at
a single time. Erase multiple 16-bit Words (up to the complete memory bank) using the
BLOCKERASE command.
Table 2. Memory bank description
Memory Bank
Description
USER
User-specific data
TID (Tag-identification Data)
EPC (Electronic Product Code)
Manufacturer and custom information
CRC-16, Protocol Control and item identification code (EPC)
RESERVED
Kill and access passwords
Note:
The 64-bit TID memory content is written by STMicroelectronics during the manufacturing
process in compliance with the ISO 15963 Technical Report in order to comply with ISO 18000
recommendations.
Figure 3 describes the three-memory bank configuration.
Figure 3. Three-memory bank configuration
Bank 10
TID Bank
Bank 01
EPC Bank
Bank 00 ^{RESERVED Bank}
64-bit
304-bit
64-bit
30h
TID
3Fh
20h
TID
2Fh
10h
TID
1Fh
00h
TID = E002h
0Fh
120h
110h
...
...
...
20h
10h
00h
RFU
EPC
...
up to 256 EPC bit
...
EPC
(PC+EPC) length AFI/NSI
CRC16
12Fh
11Fh
...
...
...
2Fh
1Fh
0Fh
30h
Access Password
3Fh
20h
Access Password
2Fh
10h
Kill Password
1Fh
00h
Kill Password
0Fh
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