X0203MA5BL2 Datasheet, PDF (3/5 Pages) STMicroelectronics – SENSITIVE GATE SCR

Fig.1 : Maximum average power dissipation ver-
sus average on-state current.
X02xxxA
Fig.2 : Correlation between maximum average
power dissipation and maximum allowable tem-
perature (Tamb and Tlead).
P (W)
1.2
O
360
1.0
DC
0.8
= 180^o
0.6
= 120^o
= 90^o
0.4
= 60^o
0.2
0.0
0
= 30^o
IT(AV)(A)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
P (W)
1.2
1.0
0.8
Rth( j- a)
0.6
0.4
0.2
0.0
0
Tamb (^oC)
20 40 60
Rth( j- l)
Tlead (^oC)
-50
-70
-90
-110
80 100 120 140
Fig.3 : Average on-state current versus lead tem-
perature.
I _T(AV) (A)
1.4
DC
1.2
1.0
0.8
= 180^o
0.6
0.4
0.2
0.0
0
Tlead (^oC)
10 20 30 40 50 60 70 80 90 100 110 120 130
Fig.4 : Relative variation of thermal impedance
junction to ambient versus pulse duration.
Zth(j-a)/Rth(j-a)
1.00
0.10
0.01
1E-3
1E-2
1E-1 1 E+0
tp (s)
1E+1 1E+2 5E+2
Fig.5 : Relative variation of gate trigger current and
holding current versus junction temperature.
Igt[Tj]
Igt[Tj=25 ^o C]
10. 0
9.0
Ih[Tj]
Ih[Tj=25 ^o C]
8.0
7.0
6.0
5.0
Igt
4.0
3.0
2.0 _Ih
1.0
Tj(^oC)
0.0
-40 -20 0 20 40 60
80 100 120 140
Fig.6 : Non repetitive surge peak on-state current
versus number of cycles.
ITS _M(A)
25
20
Tj initial = 25^oC
15
10
5
Number of cycles
0
1
10
100
100 0
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