STD3NA50 Datasheet, PDF (3/10 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

STD3NA50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
t_d(on)
t_r
(di/ d t) o n
Q_g
Q_gs
Qgd
Parameter
Turn-on Time
Rise Time
Turn-on Current Slope
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V_DD = 250 V I_D = 1.5 A
R_G = 18 Ω
V_GS = 10 V
(see test circuit, figure 3)
VDD = 400 V ID = 3 A
RG = 18 Ω
VGS = 10 V
(see test circuit, figure 5)
V_DD = 400 V I_D = 3 A V_GS = 10 V
Min.
Typ.
14
23
340
21
6
9
Max.
20
30
28
Unit
ns
ns
A/µs
nC
nC
nC
SWITCHING OFF
Symb ol
tr(Vof f)
tf
t_c
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 400 V ID = 3 A
RG = 18 Ω VGS = 10 V
(see test circuit, figure 5)
Min.
Typ.
13
11
26
Max.
18
16
35
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Conditions
I_{S D}
I _SDM(•)
Source-drain Current
Source-drain Current
(pulsed)
VSD (∗) Forward On Voltage
ISD = 2.7 A VGS = 0
t_rr
Reverse Recovery
Time
Qrr Reverse Recovery
Charge
I_SD = 3 A di/dt = 100 A/µs
V_DD = 100 V T_j = 150 ^oC
(see test circuit, figure 5)
IRRM Reverse Recovery
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ.
Max.
2.7
10.8
Unit
A
A
1.6
V
350
ns
4.2
µC
24
A
Safe Operating Area
Thermal Impedance
3/10