HCC4089B Datasheet, PDF (3/13 Pages) STMicroelectronics – BINARY RATE MULTIPLIER

LOGIC DIAGRAM
HCC/HCF4089B
TRUTH TABLE
Inputs
Number of Pulses or Input Logic Level
(0 = low ; 1 = high ; X = don’t care)
INH
D C B A CLK
IN
ST R CAS CLR
0 0 0 0 16
0
0
0
0
0 0 0 1 16
0
0
0
0
0 0 1 0 16
0
0
0
0
0 0 1 1 16
0
0
0
0
SET
0
0
0
0
Outputs
Number of Pulses or Output Logic Level
(L = low ; H = high)
OUT
OUT
I NH
OUT
”15”
OUT
L
H
1
1
1
1
1
1
2
2
1
1
3
3
1
1
0 1 0 0 16
0
0
0
0
0
4
4
1
1
0 1 0 1 16
0
0
0
0
0
5
5
1
1
0 1 1 0 16
0
0
0
0
0
6
6
1
1
0 1 1 1 16
0
0
0
0
0
7
7
1
1
1 0 0 0 16
0
0
0
0
0
8
8
1
1
1 0 0 1 16
0
0
0
0
0
9
9
1
1
1 0 1 0 16
0
0
0
0
0
10
10
1
1
1 0 1 1 16
0
0
0
0
0
11
11
1
1
1 1 0 0 16
0
0
0
0
0
12
12
1
1
1 1 0 1 16
0
0
0
0
0
13
13
1
1
1 1 1 0 16
0
0
0
0
0
14
14
1
1
1 1 1 1 16
0
0
0
0
0
15
15
1
1
X X X X 16
1
0
0
0
0
•
•
H
•
X X X X 16
0
1
0
0
0
L
H
1
1
X X X X 16
0
0
1
0
0
H
*
1
1
1 X X X 16
0
0
0
1
0
16
16
H
L
0 X X X 16
0
0
0
1
0
L
H
H
L
X X X X 16
0
0
0
0
1
L
H
L
H
* Output same as the first 16 lines of this truth table (depending on values of A, B, C, D).
• Depends on internal state of counter.
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