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ESM1600B Datasheet, PDF (3/10 Pages) STMicroelectronics – QUAD COMPARATOR INTERFACE CIRCUIT
ESM1600B
ELECTRICAL CHARACTERISTICS
VCC = +35V, -25oC ≤ Tamb ≤ +85oC (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Typ. Fig.
VI
VI
+
–
Input Voltage Range - Note 1
Non-inverting Input 0
Inverting Input
2
V
33
33
VC Input Control Voltage (2V < VCM < 33V) - Note 2
150
500 mV
1
IIB
Input Bias Current - Note 3
1
5
µA
ISC
VCC–VO
Short-circuit Output Current
VCC = +10 to +35 V
Output Saturation Voltage (high level) - (IO = –10mA)
mA
2
6
25
1
1.5
V
3
IOL
IOH
Output Off-state Current
(VI + = 2V, VI – = 33V)
µA
4
1
5
ICC Supply Current
RL = ∞ for the 4 Comparators
RL Common for the 4 Comparators
SVO Output Slew-rate (RL = 3kΩ, Tamb = +25oC)
mA
5
3
5
9
12
1
V/µs
VF
Input Protective Diode Forward Voltage
(I = 20mA, Tamb = +25oC)
V
1.5
–
Energy of Pulses against which Circuit Output is Protected
(Tamb = +25oC) - Note 4
mJ
20
–
Pulsed Current Applied to Protective Output Diodes
(Tamb = +25oC) - Note 5
A
6
0.4
No tes : 1. When negative input is biased between 0 and 2 volts output is always low.
2. Comparator hysteresis voltage on positive input on the one hand and negative input on the other hand equals sum of input control
voltages VC1 + VC2 or VC3 + VC4.
3. Input current flows out of the circuit owing to PNP input stage. This current is constant and independent of output level. So no load
change is transmitted to inputs.
4. By definition, a circuit is immunized against powerful signals when no durable character istic change occurs after the application of
these signals and when the circuit has not been destroyed.
In industrial surroundings, parasitic signals contain usually high voltage (over 200 V) AC harmonics having variable impedance of
500 Ω to 10kΩ.
The powerdissipation of thesesignals is divided between clamping diodes and the VCC. Simulationis used to determine the maximum
energy level. The injected current value cannot in any case exceed 3A.
5. Output protective diodes are tested individually by means of positive and negative dischar ge voltages of a capacitor. The negative
discharge control occurs through a single diode. During positive discharge, due to the properties of integration, a grounded collector
PNP transistor appears in parallel with the clamping diode connected to VCC. A part of the current flows through this transistor, VCE
being greater than VCC. If T is the total discharge duration, energy dissipated in the circuit is :
T
W = ⌠⌡ [ i1 ⋅ vd + i2 (VCC + vd) ] dt
O
For a certain injected current, the lower the current I2, that is to say the lower the PNP current gain the smaller the energy is dissipated in the cir-
cuit. Topology and technological processes have been chosen to shorten this current gain.
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