AN827 Datasheet, PDF (3/20 Pages) STMicroelectronics – A 500W HIGH POWER FACTOR WITH THE L4981A

AN827 APPLICATION NOTE
this input capacitor. However, the evaluation results listed in Table 1 were made with an EMI filter placed be-
tween the mains input and the PFC circuit. The design of the EMI filter is not described here. The value of the
input filter capacitor can be calculated as follows:
Cin > Kr ₂-----_â‹---_π-----_â‹---_f--_S----_w--^I--_â‹^r--^m-_r----^s_â‹---_V----_r--_m----_s-----_m----_i--_n-
Cin > 0.25 ⋅ ₂-----_â‹---_π-----_â‹---₈---₀--⁶--_k-^.--³--_â‹--¹-₀---_.--₀---₆-----_â‹---₈---₈-- = 0.59µF
Where:
Kr is the current ripple coefficient r = 0.02 to 0.08
The maximum value of this capacitor is limited to avoid line current distortion. The value chosen for this demo-
board is 0.68µF.
Output Bulk Capacitor
The choice of the output bulk capacitor, C6, depends on the electrical parameters that affect the filter perfor-
mance and also on the subsequent application.
Capacitance Value:
The value shall be chosen to limit the output voltage ripple according to the following formula:
Assume low ESR and ∆V_ripple= ±8V
C_out = ₂----_π-----_â‹---₂----_f--^P-_â‹---^o_∆---^u-_V--^t--_O-----_â‹---_V-----_O-- = ₂----_π-----_â‹---₁---₂--^P--₀--^o---_â‹^u---₈^t-----_â‹---₄---₀---₀-- = 207µF
The value chosen is 330uf to ensure that the maximum specified voltage ripple is not exceeded.
Although the ESR does not normally affect the voltage ripple, it has to be considered for the power losses due
to the line and switching frequency ripple currents. It is important to verify that the low and high frequency ripple
currents do not exceed the manufacturer’s specified ratings at the operating case temperature. Capacitors may
be connected in parallel to decrease the equivalent ESR and to increase the ripple current handling capability.
If a specific hold-up time is required, that is the capacitor has to deliver the supply voltage for a specified time
and for a specified dropout voltage, then the capacitor value will be determined by the following equation:
Where:
C_out = _V-----_o-²---_m--^â‹--_i-^P_n---₂-^o---–^u---^t-_V--^â‹---_o^t--^h-_p--^o--_m-^l-^d--_i-_n---₂-
P_out
V_omin
V_opmin
t_hold
is the maximum output power
is the minimum output voltage at max. load
is the minimum operating voltage before "power fail" detection
is the required hold-up time
Voltage Rating:
The capacitor output voltage rating should not be exceeded under worst case conditions. The minimum voltage
rating is calculated as follows:
3/20