AN2482 Datasheet, PDF (3/18 Pages) STMicroelectronics – The purpose of this document

AN2482
PCLT Description
It is housed in a very low R_TH exposed pad surface mount TSS0P14 package to reduce the
printed board size and the cooling pad.
1.2
Operating modes
Figure 2. gives the input limits and operating ranges defined by IEC 61131-2 standard and a
typical PCLT characteristic.
Figure 2. EC61131-2 operating regions and PCLT2 characteristic
25
20
15
10
5 _{OFF region}
0
0
I _OFF
TYPE 1 0.5 mA
TYPE 3 1.5 mA
TYPE 2 2.0 mA
30VV
2.1mA
ON regioOnN
11V
I _ON
2 mA
2 mA
6 mA
TYPE 1
V_ON TYPE 2
TYPE 3
TYPE 1
V_OFF TYPE 2
TYPE 3
15 V
11 V
11 V
5V
5V
5V
Iin (mA)
In accordance with IEC 61131-2 standard, for both opto-coupler and CMOS configuration
modes, when the input current is less than 2 mA (type 2) or 1.5 mA (type 3) the output
circuits divert all the input current and maintain both LED and output in OFF state
(V_OL < 0.1 V for V_MOD = 0 and 20% V_MOD for V_MOD > 2.9 V).
When the module input voltage V_I (type 2), including the 750 Ω input resistor and the
reverse diode (see Figure 4.), is higher than 11 V, i.e. the PCLT input voltage V_IN is higher
than 5 V, both LED and output circuits are in ON states. The input current is then shared
between the COMs (about 10%), the LED (about 60%), and the OUT (about 30%) pins in
case of opto-coupler mode.
In CMOS mode, the CMOS output level is defined by the V_MOD voltage supplied by the
external supply voltage V_DD of the bus controller. It can be in the range of 3.3 to 12 V. The
output voltage is delivering 80% of V_DD for ON state and 20% of V_DD for OFF state.
When no LED diode is used, the LED outputs pin must be connected to the ground COM_P to
allow the current to flow back to the power supply.
3/18