AN2030 Datasheet, PDF (3/13 Pages) STMicroelectronics – BACK EMF DETECTION DURING PWM ON TIME BY ST7MC

BACK EMF DETECTION DURING PWM ON TIME BY ST7MC
Considering the parasitic capacitance C_oes in the switches, the voltage in the floating phase
will have some transition time during PWM off time. Figure 2 shows the circuit where the PWM
is applied to phases A and B while phase C is floating.
Figure 2. Phase C is floating
Vdc
Va
Vb
GND
C_oes
r
L
e_a
r
Vc
r
C_oes
L
e_b
Vn
L
e_c
We can simplify the circuit by using the neutral voltage Vn=1/2 * ec during PWM off time [1]
and during PWM on time (see next chapter) to get the equivalent circuit in Figure 3.
Figure 3. Simplified equivalent circuit when phase C is floating
Vc
r
L
3
2
e_c
2*C_oes
When PWM is on in phase A and B, the terminal voltage in steady state will be:
v_c
=
1--
2
v_d
c
+
3--
2
e_c
(2)
which is the initial condition in the capacitor during PWM off time.
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