ST6255C Datasheet, PDF (29/84 Pages) STMicroelectronics – 8-bit MCUs with ADC, safe reset, auto-reload timer, EEPROM and SPI

ST6255C ST6265C ST6265B
DIGITAL WATCHDOG (Cont’d)
These instructions test the C bit and Reset the
MCU (i.e. disable the Watchdog) if the bit is set
(i.e. if the Watchdog is active), thus disabling the
Watchdog.
In all modes, a minimum of 28 instructions are ex-
ecuted after activation, before the Watchdog can
generate a Reset. Consequently, user software
should load the watchdog counter within the first
27 instructions following Watchdog activation
(software mode), or within the first 27 instructions
executed following a Reset (hardware activation).
It should be noted that when the GEN bit is low (in-
terrupts disabled), the NMI interrupt is active but
cannot cause a wake up from STOP/WAIT modes.
Figure 18. A typical circuit making use of the
EXERNAL STOP MODE CONTROL feature
SWITCH
NMI
I/O
Figure 19. Digital Watchdog Block Diagram
RESET
VR02002
Q
RSFF
S
R
-2⁷
DB1.7 LOAD SET
8
DB0
WRITE
RESET
DATA BUS
-2 ⁸
SET
-12
OSCILLATOR
CLOCK
VA00010
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