M7020R Datasheet, PDF (29/150 Pages) STMicroelectronics – 32K x 68-bit Entry NETWORK SEARCH ENGINE

M7020R
COMMAND CODES AND PARAMETERS
A master device, such as an ASIC controller, is-
sues commands to the M7020R using the Com-
mand Valid CMDV signal and the CMD Bus. The
following subsections describe the functions of the
commands.
Command Codes
The M7020R implements four basic commands
shown in Table 16. The Command Code must be
presented to CMD[1:0] while keeping the com-
mand valid (CMDV) signal high for two CLK2X cy-
cles. These two CLK2X cycles are designated as
“Cycle A” and “Cycle B.” The controller ASIC must
align the instructions with the PHS_L signal. The
CMD[8:2] field passes the parameters of the com-
mand in Cycles A and B.
Commands and Command Parameters
Table 17, page 29 lists the CMD bus fields that
contain the M7020R command parameters as well
as their respective cycles.
Table 16. Command Codes
CMD Code
Command
00
READ
01
WRITE
10
SEARCH
11
LEARN
Description
Reads one of the following: data array, mask array, device registers, or external
SRAM.
Writes one of the following: data array, mask array, device registers, or external
SRAM.
Searches the data array for a desired pattern using the specified register from the
global mask register array and local mask associated with each data cell.
The device has internal storage for up to 16 comparands that it can learn. The
device controller can insert these entries at the next free address (as specified by
the NFA register) using the LEARN Instruction.
Table 17. Command Parameters
Cmd Cyc
8
7
6
5
4
3
2
10
A SADR[21] SADR[20]
X
READ
B
0
0
0
0
0
0
0
0
0
0 = Single
1 = Burst
0 = Single
1 = Burst
00
00
WRITE
A SADR[21] SADR[20]
B
0
0
X
Global Mask
Register Index [2:0]
0 = Single
1 = Burst
01
0
Global Mask
Register Index [2:0]
0 = Single
1 = Burst
01
68-bit or 136-bit: 0
SEARCH
A
SADR[21]
SADR[20]
SADR[19]
Global Mask
Register Index [2:0]
272-bit:
1 in 1st Cycle
0 in 2nd Cycle
10
B Successful Search Register Index[2:0]
Comparand Register Index
10
A SADR[21] SADR[20]
X
Comparand Register Index
11
LEARN⁽¹⁾
B
0
Mode
0
0: 68-bit
1: 136-bit
Comparand Register Index
11
Note: 1. The 272-bit-configured devices or 272-bit-configured quadrants within devices do not support the LEARN Instruction.
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