DSM2180F3V Datasheet, PDF (29/63 Pages) STMicroelectronics – DSM (Digital Signal Processor System Memory) For Analog Devices ADSP-218X Family (3.3V Supply)

DSM2180F3V
element, or combinatorial logic. The multiplexer
selects between the sequential or combinatorial
logic outputs. The multiplexer output can drive a
port pin and has a feedback path to the AND Array
inputs.
The flip-flop in the Output Macrocell (OMC) block
can be configured as a D, T, JK, or SR type in PS-
Dsoft Express^TM. The flip-flop’s clock, preset, and
clear inputs may be driven from a product term of
the AND Array. Alternatively, CLKIN (PD1) can be
used for the clock input to the flip-flop. The flip-flop
is clocked on the rising edge of CLKIN (PD1). The
preset and clear are active High inputs. Each clear
input can use up to two product terms.
Output Macrocell Allocator. Outputs of the 16
OMCs can be routed to a combination of pins on
Port B or Port D as shown in Figure 16. The OMC
output pin is automatically determined by
choosing pin functions in PSDsoft Express^TM.
Routing can occur on a bit-by-bit basis, spitting
assignment between the Ports. However, one
OMC can be routed to one Port pin only, not both.
Figure 16. OMC Allocator
PORT B PINS
76543210
PORT C PINS
76543210
7 6 5 4 32 1 0
OMCs (MCELLAB)
7 6 54 3 2 10
OMCs (MCELLBC)
AI04915
Table 10. Output Macrocell Port and Data Bit Assignments
Output
Macrocell
Port
Assignment
Native Product Terms
Maximum Borrowed
Product Terms
Data Bit for Loading or
Reading
McellAB0
Port B0
3
6
D0
McellAB1
Port B1
3
6
D1
McellAB2
Port B2
3
6
D2
McellAB3
Port B3
3
6
D3
McellAB4
Port B4
3
6
D4
McellAB5
Port B5
3
6
D5
McellAB6
Port B6
3
6
D6
McellAB7
Port B7
3
6
D7
McellBC0
Port B0 or C0
4
5
D0
McellBC1
Port B1 or C1
4
5
D1
McellBC2
Port B or, C2
4
5
D2
McellBC3
Port B3 orC3
4
5
D3
McellBC4
Port B4 orC4
4
6
D4
McellBC5
Port B5 or C5
4
6
D5
McellBC6
Port B6 orC6
4
6
D6
McellBC7
Port B7 orC7
4
6
D7
Product Term Allocator. The CPLD has a Prod-
uct Term Allocator. PSDsoft Express^TM uses the
Product Term Allocator to borrow and place prod-
uct terms from one Macrocell to another. This hap-
pens automatically in PSDsoft Express^TM, but
understanding how allocation works will help you if
your logic design does not “fit”, in which case you
may try selecting a different pin or different OMC
where the allocation resources may differ and the
design will then fit. The following list summarizes
how product terms are allocated:
s McellAB0-McellAB7 all have three native
product terms and may borrow up to six more
s McellBC0-McellBC3 all have four native product
terms and may borrow up to five more
s McellBC4-McellBC7 all have four native product
terms and may borrow up to six more.
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