UM0438 Datasheet, PDF(28/50 Page) STMicroelectronics – This user manual defines a programming model for use with the variable-length encoding

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UM0438 Datasheet, PDF (28/50 Pages) STMicroelectronics – This user manual defines a programming model for use with the variable-length encoding

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Simplified mnemonics for VLE instructions

UM0438

A.4.4

These mnemonics are described in Section A.5.2: Simplified mnemonics that incorporate

CR conditions (eliminates BO32 and BO16 and replaces BI32 with crS)

BI32 and BI16 operand instruction encoding

The entire 4-bit BI32 and 2-bit BI16 fields, shown in Figure 2, represent the bit number for

the CR bit to be tested. For standard branch mnemonics and for branch simplified

mnemonics that do not incorporate a CR condition, the BI32 operand provides all 4 bits and

the BI16 operand provides all 2 bits.

For simplified branch mnemonics described in Section A.5.2: Simplified mnemonics that

incorporate CR conditions (eliminates BO32 and BO16 and replaces BI32 with crS) the BI32

or BI16 operand is replaced by a crS operand. To understand this, it is useful to view the

BI32 operand as composed of two parts. As Figure 2 shows, BI32[0â1] indicates the CR

field and BI32[2â3] represents the condition to test. The 2-bit BI16 operand only has one

part, BI16[0â1] represents the condition within CR0 to test.

Figure 2. BI32 and BI16 fields

BI32 Opcode Field

0123

BI16 Opcode Field

BI32[0â1] specifies CR field, CR0âCR3. BI32[2â3] and BI16[0â1] specifies one

of the 4 bits in a CR field. (LT, GT, EQ,

SO)

Simplified mnemonics based on

CR conditions but not CTR values

âbranch if true : BO32=1 or

BO16=1

âbranch if false: BO32=0 or

BO16=0

Specified by a Incorporated into the

separate, reduced simplified mnemonic.

BI32 operand (crS)

Standard branch mnemonics and The BI32 operand specifies the entire 4-bit field

simplified mnemonics based on and the BI16 operand specifies a 2-bit field. If

CTR values CR0 is used, the bit can be identified by LT, GT,

EQ, or SO. For BI32, if CR1âCR3 are used, the

form 4 * crS + LT|GT|EQ|SO can be used.

Integer record-form instructions update CR0 and floating-point record-form instructions

update CR1, as described in Table 15.

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