PSD312B-70J Datasheet, PDF (28/85 Pages) STMicroelectronics – Low Cost Field Programmable Microcontroller Peripherals

PSD3XX Family
12.0
Control Signals
(cont.)
Table 8B. Internal PSD Signal States During and Just After Reset
Component
Internal Signal
State During
Internal Signal
Reset
Internal
Signal State
During
Power-Down
PAD A and PAD B
CS0-CS10
CSADIN,
CSADOUT1,
CSADOUT2,
CSIOPORT,
ES0-ES7, RS0
Logic 1 (inactive) Per CS Equations
Logic 0 (inactive)
Per equations
for each
internal signal
All registers in CSIOPORT
address space, including:
)  Direction
t(s ^{ Data}
N/A
 Page
uc ^{ PMR (turbo bit,}
d ZPSD3XX only)
Pro _t(s) ^{NOTE: N/A = Not Applicable}
Logic 0 in all bit of Logic 0 until
all registers changed by MCU
lete ^{uc Figure 8. The Reset Cycle (RESET) (ZPSD3XXV Versions)}
- ^{Obso te Prod V}IH
t(s) ^{ole VIL}
c ^bs _{500 ns}
O_O^b_b^s_s^o_o^l_l^e_e^t_t^ee ^{PPrroodduuct(s) - O RESETLOW}
500 ns
RESET HIGH
ZPSD3XXV
IS OPERATIONAL
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