TDA7718B Datasheet, PDF (26/40 Pages) STMicroelectronics – 3 band car audio processor

I²C bus specification
5
I²C bus specification
TDA7718B
5.1
5.2
Interface protocol
The interface protocol comprises:
 a start condition (S)
 a chip address byte (the LSB determines read/write transmission)
 a subaddress byte
 a sequence of data (N-bytes + acknowledge)
 a stop condition (P)
 the max. clock speed is 400 kbit/s
 3.3 V logic compatible
Figure 20. I²C bus interface protocol
6&/
6'$ 6
FKLSDGGUHVV
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S = Start
ACK = Acknowledge
, 6$ 6$ 6$ 6$ 6$
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I²C bus electrical characteristics
Table 6. I²C bus electrical characteristics
Symbol
Parameter
Min
Max
Unit
f_SCL
VIH
VIL
t_HD,STA
t_SU,STO
t_LOW
t_HIGH
t_F
t_R
t_HD,DAT
t_SU,DAT
SCL clock frequency
High level input voltage
Low level input voltage
Hold time for START
Setup time for STOP
Low period for SCL clock
High period for SCL clock
Fall time for SCL/SDA
Rise time for SCL/SDA
Data hold time
Data setup time
-
400
kHz
2.4
-
V
-
0.8
V
0.6
-
µs
0.6
-
µs
1.3
-
µs
0.6
-
µs
-
300
ns
-
300
ns
0
-
ns
100
-
ns
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