STM8S103K3T6C Datasheet, PDF (26/117 Pages) STMicroelectronics – Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C

Pinout and pin description
STM8S103K3 STM8S103F3 STM8S103F2
Pin no.
Pin name
TSSOP/SO20 UFQFPN20
3
20
PD6/ AIN6/
UART1 _RX
Type
Input
floating wpu
I/O X
X
Output
Ext.
interr.
H₍₁i₎gh sink _{Speed OD}
X
HS
O3 X
PP
Main
function
(after
reset)
Default
alternate
function
Alternate function
after remap [option
bit]
X Port D6 Analog input 6/
UART1 data
receive
4
1
NRST
I/O
X
5
2
PA1/ OSCIN ⁽²⁾
I/O
X
X
X
O1 X
Reset
X Port A1 Resonator/
crystal in
6
3
PA2/ OSCOUT
I/O X
X
X
O1 X
X Port A2 Resonator/
crystal out
7
4
VSS
S
8
5
VCAP
S
Digital ground
1.8 V regulator capacitor
9
6
VDD
S
Digital power supply
10
7
PA3/ TIM2_ CH3 I/O X
X
X
HS
O3 X
X Port A3 Timer 2
SPI master/ slave
[SPI_ NSS]
channel 3
select [AFR1]
11
8
PB5/ I2C_ SDA
I/O
X
X
[TIM1_ BKIN]
O1
T₍₃₎
Port B5 I2C data
Timer 1 - break
input [AFR4]
12
9
PB4/ I2C_ SCL
I/O X
X
O1
T₍₃₎
Port B4 I2C clock
ADC external
trigger [AFR4]
13
10
PC3/ TIM1_CH3 I/O X
X
X
HS
O3 X
X Port C3 Timer 1 -
Top level interrupt
[TLI] [TIM1_
channel 3
[AFR3] Timer 1 -
CH1N]
inverted channel 1
[AFR7]
14
11
PC4/ CLK_CCO/ I/O X
X
X
HS
O3 X
X Port C4 Configurable Timer 1 - inverted
TIM1_
clock
channel 2 [AFR7]
CH4/AIN2/[TIM1_
output/Timer 1
CH2N]
- channel
4/Analog input
2
15
12
PC5/ SPI_SCK
I/O X
X
X
HS
O3 X
X Port C5 SPI clock
Timer 2 - channel 1
[TIM2_ CH1]
[AFR0]
16
13
PC6/ SPI_MOSI I/O X
X
X
HS
O3 X
X Port C6 SPI master
Timer 1 - channel 1
[TIM1_ CH1]
out/slave in
[AFR0]
17
14
PC7/ SPI_MISO I/O X
X
X
HS
O3 X
X Port C7 SPI master in/ Timer 1 - channel 2
[TIM1_ CH2]
slave out
[AFR0]
18
15
PD1/ SWIM
I/O X
X
X
HS
O4 X
X Port D1 SWIM data
interface
19
16
PD2/AIN3/[TIM2_ I/O X
X
X
HS
O3 X
X Port D2 Analog input 3 Timer 2 - channel 3
CH3]
[AFR1]
20
17
PD3/ AIN4/ TIM2_ I/O X
X
X
HS
O3 X
X Port D3 Analog input 4/
CH2/ ADC_ ETR
Timer 2 -
channel 2/ADC
external trigger
(1) _{I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the total driven current must respect the absolute}
maximum ratings.
(2) _{When the MCU is in halt/active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for waking up the device. In this mode, the output}
state of PA1 is not driven. It is recommended to use PA1 only in input mode if halt/active-halt is used in the application.
(3) _{In the open-drain output column, "T" defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to VDD are not implemented).}
26/117
DocID15441 Rev 9