English
Language : 

STM8L052R8T6 Datasheet, PDF (26/55 Pages) STMicroelectronics – Value Line, 8-bit ultralow power MCU, 64-KB Flash
Pin description
STM8L052R8
Table 4.
Pin
number
High density value line STM8L05xxx pin description (continued)
Input
Output
Pin name
Default alternate function
16 PG2/USART3_CK
17 PG3[TIM3_ETR]
I/O FT(2) X
X
X
HS X
X
Port G2
USART 3 synchronous
clock
I/O FT(2) X X X HS X X Port G3 [Timer 3 - trigger]
9 VSSA/VREF-
S
Analog ground voltage /
ADC1 negative voltage reference
55 VDD2
S
56 VSS2
S
1
PA0(6)/[USART1_CK](8)/
SWIM/BEEP/IR_TIM (7)
I/O
IOs supply voltage
IOs ground voltage
[USART1 synchronous
X
X
X
HS X
X
Port A0
clock](8) / SWIM input and
output /Beep output
/ Infrared Timer output
29 VDD3
S
IOs supply voltage
30 VSS3
S
IOs ground voltage
1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be
configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1
pin as general purpose output in the STM8L15x and STM8L16x reference manual (RM0031).
2. In the 5 V tolerant I/Os, protection diode to VDD is not implemented.
3. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.
4. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are
not implemented).
5. SEG/COM multiplexing available on medium+ and high density devices. SEG signals are available by default (see
reference manual for details).
6. The PA0 pin is in input pull-up during the reset phase and after reset release.
7. High Sink LED driver capability available on PA0.
8. [ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not
aduplication of the function).
26/55
Doc ID 023133 Rev 2