ST7MC1 Datasheet, PDF (26/308 Pages) STMicroelectronics – 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI

ST7MC1/ST7MC2
CENTRAL PROCESSING UNIT (Cont’d)
Stack Pointer (SP)
Read/Write
Reset Value: 01 FFh
15
8
0
0
0
0
0
0
0
1
7
0
SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
The Stack Pointer is a 16-bit register which is al-
ways pointing to the next free location in the stack.
It is then decremented after data has been pushed
onto the stack and incremented before data is
popped from the stack (see Figure 12).
Since the stack is 256 bytes deep, the 8 most sig-
nificant bits are forced by hardware. Following an
MCU Reset, or after a Reset Stack Pointer instruc-
tion (RSP), the Stack Pointer contains its reset val-
ue (the SP7 to SP0 bits are set) which is the stack
higher address.
The least significant byte of the Stack Pointer
(called S) can be directly accessed by a LD in-
struction.
Note: When the lower limit is exceeded, the Stack
Pointer wraps around to the stack upper limit, with-
out indicating the stack overflow. The previously
stored information is then overwritten and there-
fore lost. The stack also wraps in case of an under-
flow.
The stack is used to save the return address dur-
ing a subroutine call and the CPU context during
an interrupt. The user may also directly manipulate
the stack by means of the PUSH and POP instruc-
tions. In the case of an interrupt, the PCL is stored
at the first location pointed to by the SP. Then the
other registers are stored in the next locations as
shown in Figure 12.
– When an interrupt is received, the SP is decre-
mented and the context is pushed on the stack.
– On return from interrupt, the SP is incremented
and the context is popped from the stack.
A subroutine call occupies two locations and an in-
terrupt five locations in the stack area.
Figure 12. Stack Manipulation Example
CALL
Subroutine
Interrupt
Event
PUSH Y
POP Y
IRET
RET
or RSP
@ 0100h
SP
SP
PCH
@ 01FFh PCL
SP
CC
A
X
PCH
PCL
PCH
PCL
Stack Higher Address = 01FFh
Stack Lower Address = 0100h
SP
Y
CC
A
X
PCH
PCL
PCH
PCL
CC
A
X
PCH
PCL ^SP
PCH
PCL
PCH
SP
PCL
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