STM32F091XB Datasheet, PDF (25/127 Pages) STMicroelectronics – ARM-based 32-bit MCU, up to 256 KB Flash, CAN, 12 timers, ADC, DAC & comm. interfaces, 2.0 - 3.6V

STM32F091xB STM32F091xC
Functional overview
verifications and ALERT protocol management. I2C1 also has a clock domain independent
from the CPU clock, allowing the I2C1 to wake up the MCU from Stop mode on address
match.
The I2C peripherals can be served by the DMA controller.
Refer to Table 9 for the differences between I2C1 and I2C2.
Table 9. STM32F091xB/xC I²C implementation
I²C features⁽¹⁾
I2C1
7-bit addressing mode
X
10-bit addressing mode
X
Standard mode (up to 100 kbit/s)
X
Fast mode (up to 400 kbit/s)
X
Fast Mode Plus (up to 1 Mbit/s) with 20 mA output drive I/Os
X
Independent clock
X
SMBus
X
Wakeup from STOP
X
1. X = supported.
I2C2
X
X
X
X
X
-
-
-
3.17
Universal synchronous/asynchronous receiver/transmitter
(USART)
The device embeds up to eight universal synchronous/asynchronous receivers/transmitters
(USART1, USART2, USART3, USART4, USART5, USART6, USART7, USART8) which
communicate at speeds of up to 6 Mbit/s.
They provide hardware management of the CTS, RTS and RS485 DE signals,
multiprocessor communication mode, master synchronous communication and single-wire
half-duplex communication mode. USART1, USART2 and USART3 support also SmartCard
communication (ISO 7816), IrDA SIR ENDEC, LIN Master/Slave capability and auto baud
rate feature, and have a clock domain independent of the CPU clock, allowing to wake up
the MCU from Stop mode.
The USART interfaces can be served by the DMA controller.
Table 10. STM32F091xB/xC USART implementation
USART modes/features⁽¹⁾
USART1
USART2
USART3
USART4
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode
Smartcard mode
X
X
X
X
X
X
X
X
X
-
USART5
USART6
USART7
USART8
-
X
X
X
-
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