ST72411R Datasheet, PDF (25/71 Pages) STMicroelectronics – 8-BIT MCU WITH SMARTCARD INTERFACE, LCD DRIVER, 8-BIT TIMER, SAFE RESET AND SUPPLY MONITORING

ST72411R
4.4 POWER SAVING MODES
4.4.1 Introduction
There are three Power Saving modes. Slow Mode
is selected by setting the relevant bits in the Mis-
cellaneous register. Wait and Halt modes may be
entered using the WFI and HALT instructions.
Table 5. Power Saving Modes
Mod e
f_CPU
CPU
Periph erals
switched off.
Wake up
Slow f_OSC/32 ON None
Wait
f_OSC/2
or
OFF None
f_OSC/32
-
- External I/O
- Timer
- LVDS (PDF Flag).
- Reset
Halt OFF
- SSS
- TIMER ¹
OFF _{- LVDS 2}
- LCD
- External I/O
- Timer
- Reset
1 _{Except with external timer clock.}
2 _{If the LVD bit in the MISCR register is reset}
Note: To reduce power consumption (in Run or
Wait modes), the smartcard supply supervisor
(SSS) and the LCD can be disabled by software.
4.4.2 Slow Mode
In Slow mode, the oscillator frequency can be di-
vided by a value defined in the Miscellaneous
Register. The CPU and peripherals are clocked at
this lower frequency except the LCD driver and the
8-bit Timer which have a fixed clock. Slow mode is
used to reduce power consumption, and enables
the user to adapt the clock frequency to the avail-
able supply voltage.
4.4.3 Wait Mode
Wait mode places the MCU in a low power con-
sumption mode by stopping the CPU. The periph-
erals remain active. During Wait mode, the I bit
(CC Register) is cleared, so as to enable all inter-
rupts. All other registers and memory remain un-
changed. The MCU will remain in Wait mode until
an Interrupt or Reset occurs, the Program Counter
then branches to the starting address of the Inter-
rupt or Reset Service Routine.
The MCU will remain in Wait mode until a Reset or
an Interrupt occurs, causing it to wake up.
Refer to Figure 19.
Figure 19. Wait Mode Flow Chart
WFI INSTRUCTION
OSCILLATOR
PERIPH. CLOCK
CPU CLOCK
I-BIT
ON
ON
OFF
CLEARED
N
N
INTERRUPT
RESET
Y
Y
OSCILLATOR
ON
PERIPH. CLOCK ON
CPU CLOCK
ON
I-BIT
SET
IF RESET
4096 CPU CLOCK
CYCLES DELAY
FETCH RESET VECTOR
OR SERVICE INTERRUPT
Note: Before servicing an interrupt, the CC register is
pushed on the stack. The I-Bit is set during the inter-
rupt routine and cleared when the CC register is
popped.
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