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M24C32-FMC6TG Datasheet, PDF (25/40 Pages) STMicroelectronics – 32-Kbit serial I²C bus EEPROM
M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
DC and AC parameters
Figure 10. AC measurement I/O waveform
)NPUTVOLTAGELEVELS
6##
6##
)NPUTANDOUTPUT
4IMINGREFERENCELEVELS
6##
6##
-36
Table 11. Input parameters
Symbol
Parameter(1)
Test condition
CIN
Input capacitance (SDA)
CIN
Input capacitance (other pins)
ZL
Input impedance (E2, E1, E0, WC)(2)
ZH
VIN < 0.3 VCC
VIN > 0.7 VCC
1. Characterized only, not tested in production.
2. E2, E1, E0 input impedance when the memory is selected (after a Start condition).
Min. Max. Unit
8 pF
6 pF
30
kΩ
500
kΩ
Table 12. Cycling performance by groups of four bytes
Symbol Parameter
Test condition(1)
Max.
Unit
Ncycle
Write cycle
endurance(2)
TA ≤ 25 °C, VCC(min) < VCC < VCC(max) 4,000,000 Write cycle(3)
TA = 85 °C, VCC(min) < VCC < VCC(max) 1,200,000
1. Cycling performance for products identified by process letter K.
2. The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1,
4*N+2, 4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and
qualification.
3. A Write cycle is executed when either a Page Write, a Byte Write, a Write Identification Page or a Lock
Identification Page instruction is decoded. When using the Byte Write, the Page Write or the Write
Identification Page, refer also to Section 5.1.5: ECC (Error Correction Code) and Write cycling.
Table 13. Memory cell data retention
Parameter
Data retention(1)
Test condition
TA = 55 °C
Min.
Unit
200
Year
1. For products identified by process letter K. The data retention behavior is checked in production. The 200-
year limit is defined from characterization and qualification results.
Doc ID 4578 Rev 21
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