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ST1CC40 Datasheet, PDF (24/37 Pages) STMicroelectronics – 3 A monolithic step-down current source with synchronous rectification
Application information
ST1CC40
To increase the design noise immunity, different signal and power ground should be
implemented in the layout (see Section 7.5: Application circuit). The signal ground serves
the small signal components, the device analog ground pin, the exposed pad and a small
filtering capacitor connected to the VINA pin. The power ground serves the device ground
pin and the input filter. The different grounds are connected underneath the output capacitor.
Neglecting the current ripple contribution, the current flowing through this component is
constant during the switching activity and so this is the cleanest ground point of the buck
application circuit.
Figure 13. Layout example
7.3
Thermal considerations
The dissipated power of the device is tied to three different sources:
 Conduction losses due to the RDS(on), which are equal to:
Equation 28
PON = RRDSON_HS  IOUT2  D
POFF = RRDSON_LS  IOUT2  1 – D
where D is the duty cycle of the application. Note that the duty cycle is theoretically given by
the ratio between VOUT (nLED VLED + 100 mV) and VIN, but in practice it is substantially
higher than this value to compensate for the losses in the overall application. For this
reason, the conduction losses related to the RDS(on) increase compared to an ideal case.
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