L6740L Datasheet, PDF (24/44 Pages) STMicroelectronics – Hybrid controller (4+1) for AMD SVID and PVID processors

Output voltage positioning
L6740L
6.1
Caution:
CORE section - Phase # programming
CORE Section implements a flexible 2 to 4 interleaved-phase converter. To program the
desired number of phase, simply short to SGND the PWMx signal that is not required to be
used according to Table 11. For three phase operation, short PWM4 to SGND while for two
phase operation, short PWM3 and PWM4 to SGND.
For the disabled phase(s), the current reading pins need to be properly connected to avoid
errors in Current-Sharing and Voltage-Positioning: CSx+ needs to be connected to the
regulated output voltage while CSx- needs to be connected to CSx+ through the same Rg
resistor used for the active phases.
Table 11. CORE section - Phase number programming
Phase number
PWM1
PWM2
PWM3
1
n/a
2
to Driver
SGND
3
to Driver
4
to Driver
PWM4
SGND
SGND
6.2
CORE section - Current reading and current sharing loop
L6740L embeds a flexible, fully-differential current sense circuitry for the CORE Section that
is able to read across inductor parasitic resistance or across a sense resistor placed in
series to the inductor element. The fully-differential current reading rejects noise and allows
placing sensing element in different locations without affecting the measurement's accuracy.
The trans-conductance ratio is issued by the external resistor Rg placed outside the chip
between CSx- pin toward the reading points. The current sense circuit always tracks the cur-
rent information, the pin CSx+ is used as a reference keeping the CSx- pin to this voltage. To
correctly reproduce the inductor current an R-C filtering network must be introduced in par-
allel to the sensing element. The current that flows from the CSx- pin is then given by the fol-
lowing equation (See Figure 10):
I_CSx-
=
D_-----C_-----R_---
R_G
⋅
-¹---₁-+----+-^s----_s-^â‹---^L-_â‹---_R-^⁄--^D--_â‹---^CC----^R---
⋅
I
P
HASE
x
Considering now to match the time constant between the inductor and the R-C filter applied
(Time constant mismatches cause the introduction of poles into the current reading network
causing instability. In addition, it is also important for the load transient response and to let
the system show resistive equivalent output impedance) it results:
--^L---- = R ⋅ C
R_L
⇒
I_CSx-
=
-^R-----^L-
R_G
⋅
I_PHASEx
=
I_INFOx
R_G resistor is typically designed in order to have an information current I_INFOx in the range of
about 35µA (I_OCTH) at the OC Threshold.
24/44