STAP16DPS05 Datasheet, PDF (23/34 Pages) STMicroelectronics – Low voltage 16-bit constant current LED sink driver

STAP16DPS05
16 CLK pulse are required to
load the data setting 1 into
shift register
Detection mode functionality
Figure 19. Error detection sequence
During the error
detection are
necessary at least
2 CLK signal plus
oneat the end
Every CLK pulse shows the results of
single Output results:Out15;14; 13 etc. etc
LE/DM1 and OE/DM2
Key Sequence
necessary to Enter
in EDM
The LE/DM1 pulse
latch the data
loaded during the
previous state
After OE/DM2 signal turn High the
SDO pin show the results of
Error Detection (Open or
Short in this case)
The OE/DM2 Pulse put
the device from
EDM to Normal
Mode
Typical schematic used to perform the error detection:
Figure 20. Error detection typical schematic
Vdd
Vled
R_EXT
I_DEC
Iset
Out
DUT
GND
Rload
AM13678v1
I_ODEC can be measured as follows:
I_ODEC = (Vled-Vload) / Rload
Table 14 and Table 15 show respectively the I_ODEC average value at 3.3 V and 5.0 V.
The I_ODEC is the current value recognized by the device output open error detection.
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