M41ST87W_11 Datasheet, PDF (23/54 Pages) STMicroelectronics – 5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

M41ST87Y, M41ST87W
Operating modes
negative voltage generated by the charge pump during a tamper condition, and from being
pulled to ground by the output of the charge pump when it is in shut-down mode (SHDN =
logic low). The gates of both MOSFETs should be connected to TP_CLR as shown in
Figure 20 on page 25. One n-channel enhancement MOSFET should be placed between
the output of the inverting charge pump and the V_OUT of the M41ST87. The other MOSFET
should be an enhancement mode p-channel, and placed between V_OUT of the M41ST87
and V_CC of the external SRAM. When TP_CLR goes high after a tamper condition occurs, the
n-channel MOSFET will turn on and the p-channel will turn off. During normal operating
conditions, TP_CLR will be low and the p-channel will be on, while the n-channel will be off.
Table 4. Tamper detection current (normally closed - TCM_X = '0')
TDS_X TCHI/TCLO_X
Tamper circuit mode
Current at 3.0 V (typ)⁽¹⁾⁽²⁾ Unit
0
0
Continuous monitoring / 10 MΩ pull-up/-down
0.3
µA
0
1
Continuous monitoring / 1 MΩ pull-up/-down
3.0
µA
1
0
Sampling (1 Hz) / 10 MΩ pull-up/-down
0.3
nA
1
1
Sampling (1 Hz) / 1 MΩ pull-up/-down
3.0
nA
1. When calculating battery lifetime, this current should be added to I_BAT current listed in Table 17 on page 44.
2. Per tamper detect input
Figure 17. Tamper detect sampling options
V_CC (V_OUT)
TAMPER HI,
NORMALLY OPEN
V_CC (V_OUT)
TAMPER LO,
NORMALLY CLOSED
TAMPER LO,
NORMALLY OPEN
V_CC (V_OUT)
TAMPER HI,
NORMALLY CLOSED
CONTINUOUS
MONITORING
CONTINUOUS
MONITORING
SAMPLED
MONITORING
TDS_X = 0
TDS_X = 1
CONTINUOUS
MONITORING
User
Configuration
TCM_X, TPM_X
CONTINUOUS
MONITORING
SAMPLED
MONITORING
TDS_X = 0
TDS_X = 1
AI07819
Doc ID 9497 Rev 10
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