ST92F120V9 Datasheet, PDF (223/324 Pages) STMicroelectronics – 8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD

I2C BUS INTERFACE
EV5: EVF=1, SB=1, cleared by reading SR1 register followed by writing DR register.
EV6: EVF=1, ADDTX=1, cleared by reading SR1 register followed by writing CR register
(for example PE=1).
EV7: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register or when DMA
is complete.
EV8: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register or when DMA
is complete.
EV9: EVF=1, ADD10=1, cleared by reading SR1 register followed by writing DR register.
Figure 108. Event Flags and Interrupt Generation
ADSL
SB
AF
STOPF
ARLO
BERR
ADD10
ADDTX
ITE
IERRP
IERRM
ERROR
INTERRUPT
REQUEST
BTF=1 & TRA=0
BTF=1 & TRA=1
IRXP
ITE
REOBP
Receiving DMA
End Of Block
ITXP
ITE
TEOBP
Transmitting DMA
End Of Block
I2CSR1.EVF
IRXM
ITXM
DATA RECEIVED
or
END OF BLOCK
INTERRUPT
REQUEST
READY TO TRANSMIT
or
END OF BLOCK
INTERRUPT
REQUEST
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