A5975AD Datasheet, PDF (22/50 Pages) STMicroelectronics – Voltage feed-forward

Closing the loop
A5975AD
Similarly for A_LC the poles can usually be defined as a double pole whose value is:
Equation 11
F_PLC
=
--------------------¹----------------------
2 ⋅ π ⋅ L ⋅ C_OUT
7.3
PWM comparator
The PWM gain is given by the following formula:
Equation 12
G_PWM(s)
=
---------------------------^V----^c---^c---------------------------
(V_OSCMAX – V_OSCMIN)
where V_OSCMAX is the maximum value of a sawtooth waveform and V_OSCMIN is the
minimum value. A voltage feed-forward is implemented to ensure a constant GPWM. This is
obtained by generating a sawtooth waveform directly proportional to the input voltage V_CC.
Equation 13
V_OSCMAX – V_OSCMIN = K ⋅ V_CC
where K is equal to 0.038. Therefore the PWM gain is also equal to:
Equation 14
G_PWM(s)
=
-¹--
K
=
const
This means that even if the input voltage changes, the error amplifier does not change its
value to keep the loop in regulation, therefore ensuring a better line regulation and line
transient response.
In summary, the open loop gain can be expressed as:
Equation 15
G(s)
=
G_PWM(s)
⋅
-------^R-----²--------
R₁ + R₂
⋅
A_O(s)
⋅
A_LC(s)
Example:
Considering R_C = 4.7 kΩ, C_C = 22 nF and C_P = 150 pF, the poles and zeroes of A₀ are:
F_P1 = 9 Hz
F_P2 = 220 kHz
F_Z1 = 1.6 kHz
If L = 10 µH, C_OUT = 330 µF and ESR = 25 mΩ, the poles and zeroes of A_LC become:
F_PLC = 2.8 kHz
F_ZESR = 20 kHz
F₀ = 44 kHz
Finally R₁ = 5.6 kΩ and R₂ = 3.3 kΩ.
The gain and phase bode diagrams are plotted respectively in Figure 11 and Figure 12.
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