FC106 Datasheet, PDF (21/32 Pages) STMicroelectronics – Fibre Channel Transceiver 1.0625 GBaud

FC106
6.2 Receive interface timing
6.2.1 Receive clock timing and latency
Figure 6.2
Receive clock timing
bit 0 of serial
data
TX+
Trbc1
RBC[1]
1.4V
Trbc_skew
RBC[0]
1.4V
Trbc0
Table 6.2
Parameter
Trbc0
Trbc1
Trbc_skew
RBC[0,1] Tr, Tf
Receive clock timing characteristics
Description
Min
RBC[0] frequency¹
RBC[1] frequency¹
RBC skew
8.9
Receive clock rise and fall time
-
(10pF load)
Typ
Max
53.125
53.125
-
9.9
2.5
-
Units
MHz
MHz
ns
ns
1. Exact frequency of RBC(0,1) depends upon the received data frequency. During byte align-
ment, the frequency of clocks RBC[0] and RBC[1] may vary by less than 1% of the specified
typical value. The clocks are guaranteed to be glitch free.
21/32
September 98
Revision 1.2