AN3100 Datasheet, PDF (21/24 Pages) Freescale Semiconductor, Inc – General Purpose Amplifier Biasing

AN3100
Pad descriptions and configurations
The following notes apply to these three bits:
● They are independent, but not completly uncorrelated. All 8 combinations are valid, but
are partially overlapping.
● They are board dependent, and must be determined during the tuning phase for every
PCB type.
● They depend on the PCB characteristic impedance and the frequency of the DDR
signals.
Bit [3], the drive mode bit, changes the output impedance of the pad and must be set in
accordance with the PCB load.
It must be set to 0 (strong mode) when the characteristic impedance of the PCB is up to 50
Ohm.
It must be set to 1 (weak mode) when the characteristic impedance of the PCB is from 50 to
70 Ohm.
Bits [2] and [1 ), prog_a and prog_b, set the “way” the internal transistors of the pad are
loaded as well as the resulting effect on the slope of the signal. These 2 bits define 4
increments of increasing capability: from 00 (slower slope) to 11 (higher slope). All
intermediate values are valid.
When you deal with high frequency signals, you should configure higher slopes to increase
the data valid window, keeping in mind that the higher the slope, the more the signal
reflection.
Doc ID 16606 Rev 2
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