TN0440 Datasheet, PDF (2/6 Pages) STMicroelectronics – M24256 and M24512 EEPROM devices

M24xxx EEPROM: 400 kHz and 1 MHz clock
1
M24xxx EEPROM: 400 kHz and 1 MHz clock
TN0440
1.1
M24xxx 400 kHz AC tables until 2007
In the last revisions of the I²C-bus specification, defined by NXP/Philips, one can see that
the 1 MHz serial clock rate was introduced in 2007:
• January 2000: the I²C-bus specification defines a clock rate of either 100 kHz, 400 kHz
or 3.4 MHz^(a).
• June 2007: the I²C-bus specification defines a new table offering all timings related to
the 1 MHz clock.
Before 2007, the M24xxx EEPROM devices offered by ST were specified with an AC table
based on a 400 kHz (max) clock rate.
Two main differences appear when comparing the 400 kHz M24xxx AC table with the I²C-
bus specification AC table (see Table 2):
• the min value of Data out hold time (t_CLQX) ;
• the max value of Pulse width ignored (t_NS).
Table 2. Access time and Noise filter parameters specified in the 400 kHz AC table
Symbol Alt
Parameter
M24xxx
Min Max
I²C-bus
Unit
Min Max
t_CLQV
t_CLQX
t_NS
t_AA
Data valid time
-
900
-
t_HD:DAT Data out hold time
100
-
0
t_SP
Pulse width ignored (input filter on SCL and
SDA)
-
50 (or
more)
0
900 ns
-
ns
50 ns
Why such differences?
The M24xxx devices are designed to offer the best performances compatible with the I²C-
bus specification, that is:
• t_CLQX
The min value of t_CLQX provides a delay for the data out time (from the falling edge of the
serial clock SCL: time for the data line SDA to hold the previous bit value before changing
state). This min value pushes away the SDA change from the SCL falling edge: that is a
safe timing condition, as SDA and SCL must never switch at the same time (such an event
is a critical event for the I²C-bus, as it could be randomly decoded as either a Start, a Stop or
a Data-in event).
• t_NS
The greater the value of t_NS, the better the filter can screen out spikes added on the I²C bus.
a. The 3.4 MHz clock rate is not supported by the M24xxx EEPROM.
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