TDA4605 Datasheet, PDF (2/6 Pages) STMicroelectronics – CONTROL CIRCUIT FOR SWITCH MODE POWER SUPPLIES USING MOS TRANSISTORS

TDA4605
PIN CONFIGURATION
Pin
Number
1
2
3
4
5
6
7
8
Description
Regulating voltage : information input concerning secondary voltage.
By comparing the regulating voltage obtained from the regulating winding of the transformer with the
internal reference voltage, the output pulse width on Pin 5 is adapted to the load of the secondary side
(normal, overload, short circuit, no load)
Primary current simulation : information input regarding the primary current. The primary current rise in the
primary winding is simulated at Pin 2 as a voltage rise by means of external RC element. When a value is
reached that is derived from the regulating voltage at Pin 1, the output pulse at Pin 5 is terminated. The
RC element serves to set the maximum power at the overload point.
Primary voltage detector : input for primary voltage monitoring. When the line voltage is too low the IC is
switched-off by comparing V3 with an internal reference. Voltage at Pin 3 is used for overload point
compensation.
Ground
Output : push-pull output for charge and discharge of the gate capacitance of the power MOS transistor.
Supply voltage : Supply voltage input. From it are derived a stable internal reference voltage (VREF) and
the switching threshold V6A, V6E, V6 max and V6 min for the supply voltage detector.
if V₆ > V_6E the V_REF is switched on and switched off when V₆ < V_6A. In addition the logic is only enable for
V_{6 min} < V₆ < V_{6 max}.
Soft-start : input for soft-start and integration network. Start-up will begin with short pulses by connecting a
capacitor between Pin 7 to ground. This capacitor together with a resistor connected between Pin 7 and
error amplifier output also as acts an integrator network for regulation.
Zero detector : Input for the oscillator feedback. After starting oscillator, every zero transit of the feedback
voltage (falling edge) triggers an output pulse at Pin 5. The trigger threshold is at typically - 50mV
BLOCK DIAGRAM
TDA4605
Re fere nce
Volta ge
(typ. 3V)
6
S upply
Volta g e
Monitor
2
V_2B
P rima ry
C urre n t
Recopy
5
Output S ta ge
a nd
Current Limit
V_{R E F}
S ta rting
4
V_6min V_6A V_6E V_{6ma x}
V_{s t}
Imp ulse
Genera tor
Cu rre n t
S ource
R e g ula ting
V_R
& Ove rload
1
Amplifier
S top
Comp.
Ove rloa d
Low Volta ge
P o int
V_u
P rote ction
Corre ction
Monitoring
3
7
Logic
Ze ro
Cros s ing
De te ctor
8
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