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E-L6561D013TR Datasheet, PDF (2/13 Pages) STMicroelectronics – POWER FACTOR CORRECTOR
L6561
Table 2. Absolute Maximum Ratings
Symbol
IVcc
IGD
INV, COMP
MULT
CS
ZCD
Pin
8
7
1, 2, 3
Parameter
Iq + IZ; (IGD = 0)
Output Totem Pole Peak Current (2µs)
Analog Inputs & Outputs
4 Current Sense Input
5 Zero Current Detector
Ptot
Power Dissipation @Tamb = 50 °C
Tj
Junction Temperature Operating Range
Tstg
Storage Temperature
(DIP-8)
(SO-8)
Value
30
±700
-0.3 to 7
-0.3 to 7
50 (source)
-10 (sink)
1
0.65
-40 to 150
-55 to 150
Unit
mA
mA
V
V
mA
mA
W
W
°C
°C
Figure 3. Pin Connection (Top view)
INV
COMP
MULT
CS
1
8
2
7
3
6
4
5
DIP8
VCC
GD
GND
ZCD
Table 3. Thermal Data
Symbol
Parameter
Rth j-amb Thermal Resistance Junction to ambient
SO 8
150
MINIDIP
100
Unit
°C/W
Table 4. Pin Description
N.
Name
Function
1
INV Inverting input of the error amplifier. A resistive divider is connected between the output
regulated voltage and this point, to provide voltage feedback.
2
COMP Output of error amplifier. A feedback compensation network is placed between this pin and the
INV pin.
3
MULT Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A voltage
signal, proportional to the rectified mains, appears on this pin.
4
CS Input to the comparator of the control loop. The current is sensed by a resistor and the resulting
voltage is applied to this pin.
5
ZCD Zero current detection input. If it is connected to GND, the device is disabled.
6
GND Current return for driver and control circuits.
7
GD Gate driver output. A push pull output stage is able to drive the Power MOS with peak current of
400mA (source and sink).
8
VCC Supply voltage of driver and control circuits.
(1) Parameter guaranteed by design, not tested in production.
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