AN971 Datasheet, PDF (2/7 Pages) STMicroelectronics – The goal of this application note is to present an practical example

I2C COMMUNICATION BETWEEN ST7 AND M24Cxx EEPROM
1 ST7 I²C INTERFACE
The ST7 I²C peripheral allows multi master and slave communication with bus error manage-
ment. In this application, only single master mode is used without error management. As
polling mode is the most difficult mode to implement, the application is based on this mode,
but it can be easily adapted for interrupt management.
The I²C synchronous communication needs only two signals: SCL (Serial clock line) and SDA
(Serial data line). The corresponding port pins have to be configured as floating inputs.
Please refer to the ST7 datasheet for more details.
1.1 COMMUNICATION SPEED
The ST7 I²C peripheral allows a large range of communication speeds. It is able to work in
standard and fast I²C modes.
In master mode the communication speed is given by the Clock Control Register (CCR). An
example is given in Table 1.
Table 1. Example of Possible I²C Communication Speeds (f_CPU=8 MHz)
Standard Mode
Fast Mode
Speed [KHz]
15.5 25.00 50.00 70.00 100.00 167.00 190.00 333.00
CCR [hex]
EC
9E
4E
37
26
8E
8C
86
1.2 START, STOP CONDITION AND ACKNOWLEDGE GENERATION
In master mode, the Start and Stop conditions can be generated by setting the START and
STOP bits in the Control Register (CR).
An Acknowledge is sent after an address or a data byte is received when the ACK bit is set in
the Control Register (CR).
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