TDA7421N Datasheet, PDF (19/38 Pages) STMicroelectronics – AM/FM TUNER FOR CAR RADIO AND HI-FI APPLICATIONS

TDA7421N
4.1 Intermediate Frequency Main Counter (IFMC)
This counter is a 13-21 bit synchronous autoreload down-counter. Four bits are programmable to have the pos-
sibility for an adjust to the frequency of the IF filter.The counter length is automatically adjusted to the chosen
sampling time and the counter mode. At the start the counter will be loaded with a defined value which is an
equivalent to the divider value (tsample fIF).If a correct frequency is applied to the IF counter frequency inputs
IF-AM and IF-FM, at the end of the sampling time the main counter is changing its state from 0 to 1FFFFFH.This
is detected by a control logic. The frequency range inside which a successful count results is detected is adjust-
able setting bits EW 0, 1, 2.
4.2 Up-down counter filter
The information coming from the IF main counter control logic is shifted into a 5 bit up down counter circuit
clocked by the sampling time signal. At the start (rising edge of the IFENA signal) the counter is set to 10H and
the SSTOP signal is forced to "1".Only when the counter reaches the value 10H - step, SSTOP goes to "0".SS-
TOP will be "1" again, if the counter reaches the value 10h + step.
Figure 3. Charge Punp Logic
CURR HIGH
LOCKENA
LOCK
CHARGE PUMP
CURRENT
D96AU548
Figure 4. FM and AM operation (swallow mode)
I²C bus
REF OSC IN
REGISTER
fosc
R0 ...R15
DIVIDER
:R
I²C bus
AM IN
FM IN
REGISTER
PC0 ...PC4
COUNTER
A
(O/I)
PRESCALER
32/33
fref
PD
fsyn
I²C bus
REGISTER
PC5 ... P15
DIVIDER
:B
D96AU545
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