SRIX4K_08 Datasheet, PDF (19/47 Pages) STMicroelectronics – 13.56 MHz short-range contactless memory chip with 4096-bit EEPROM, anticollision and anti-clone functions

SRIX4K
Memory mapping
4.4.1
4.4.2
OTP_Lock_Reg
The 8 bits, b₃₁ to b₂₄, of the System area (block address 255) are used as OTP_Lock_Reg
bits in the SRIX4K. They control the write access to the 9 EEPROM blocks with addresses 7
to 15 as follows:
● When b₂₄ is at 0, blocks 7 and 8 are write-protected
● When b₂₅ is at 0, block 9 is write-protected
● When b₂₆ is at 0, block 10 is write-protected
● When b₂₇ is at 0, block 11 is write-protected
● When b₂₈ is at 0, block 12 is write-protected
● When b₂₉ is at 0, block 13 is write-protected
● When b₃₀ is at 0, block 14 is write-protected
● When b₃₁ is at 0, block 15 is write-protected.
The OTP_Lock_Reg bits cannot be erased. Once write-protected, EEPROM blocks behave
like ROM blocks and cannot be unprotected.
Fixed Chip_ID (Option)
The SRIX4K is provided with an anticollision feature based on a random 8-bit Chip_ID. Prior
to selecting an SRIX4K, an anticollision sequence has to be run to search for the Chip_ID of
the SRIX4K. This is a very flexible feature, however the searching loop requires time to run.
For some applications, much time could be saved by knowing the value of the SRIX4K
Chip_ID beforehand, so that the SRIX4K can be identified and selected directly without
having to run an anticollision sequence. This is why the SRIX4K was designed with an
optional mask setting used to program a fixed 8-bit Chip_ID to bits b₇ to b₀ of the system
area. When the fixed Chip_ID option is used, the random Chip_ID function is disabled.
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