PM6675 Datasheet, PDF (19/47 Pages) STMicroelectronics – Very fast load transient response using constant on-time control loop

PM6675
Device description
The design of the external feedback network depends on the output voltage ripple. If the
ripple is higher than approximately 20mV, the correct C_INT capacitor is usually enough to
keep the loop stable. The stability of the system depends firstly on the output capacitor zero
frequency.
The following condition must be satisfied:
Equation 6
f_SW
>
k ⋅ f_Zout
=
k
2π ⋅ C_out
⋅ ESR
where k is a fixed design parameter (k > 3). It determinates the minimum integrator
capacitor value:
Equation 7
) ^CINT
>
g_m
2π ⋅ ⎜⎛ ^fSW −
⎝^k
f_Zout
⎟⎞
⎠
⋅
Vr
Vout
t(s _{where gm = 50µs is the integrator trans conductance.}
uc _{If the ripple on the COMP pin is greater than the integrator 150mV, the auxiliary capacitor}
rod ^{CFILT can be added. If q is the desired attenuation factor of the output ripple, CFILT is given}
by:
solete ^{P Equation 8}
C_FILT
=
C_INT
⋅ (1− q)
q
Ob _{In order to reduce the noise on the COMP pin, it is possible to add a resistor RINT that,}
- _{together with CINT and CFILT, becomes a low pass filter. The cutoff frequency fCUT must be}
) _{much greater (10 or more times) than the switching frequency:}
Product(s ^{Equation 9}
R_INT
=
2π ⋅ f_CUT
1
⋅ ^{CINT ⋅ CFILT}
C_INT + C_FILT
leteIf the ripple is very small (lower than approximately 20mV), a different compensation
network, called "Virtual-ESR" Network, is needed. This additional circuit generates a
so triangular ripple that is added to the output voltage ripple at the input of the integrator. The
Ob ^{complete control scheme is shown in Figure 8.}
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