L6712 Datasheet, PDF (19/27 Pages) STMicroelectronics – TWO-PHASE INTERLEAVED DC/DC CONTROLLER

L6712A L6712
worst case is the response time after removal of the load with the minimum output voltage programmed
and the maximum input voltage available.
MAIN CONTROL LOOP
The system control loop topology depends on the DROOP pin connection: if connected to FB (droop func-
tion active) an Average Current Mode topology must be considered while, if connected to GND (droop
function not active) a Voltage Mode topology must be considered instead.
Anyway, the system control loop encloses the Current Sharing control loop to allow proper sharing to the
inductor' currents. Each loop gives, with a proper gain, the correction to the PWMs in order to minimize
the error in its regulation: the Current Sharing control loop equalize the currents in the inductors while the
output voltage control loop fixes the output voltage equal to the reference programmed by VID (with or
without the droop effect and with or without considering the Remote Amplifier Gain). Figure 12 reports the
block diagram of the main control loop.
Figure 12. Main Control Loop Diagram
L1
+
PWM1
I_INFO2
1/5
CURRENT
SHARING
DUTY CYCLE _IINFO1
1/5
CORRECTION
L2
+
PWM2
ERROR
REFERENCE
C_O
R_O
4/5
AMPLIFIER ₊
PROGRAMMED
BY VID
-
COMP
FB
RA_Gain
D03IN1518
Z_F(S)
R_FB
Current Sharing (CS) Control Loop
Active current sharing is implemented using the information from Trans conductance differential amplifier.
A current reference equal to the average of the read current (I_AVG) is internally built; the error between the
read current and this reference is converted to a voltage with a proper gain and it is used to adjust the duty
cycle whose dominant value is set by the error amplifier at COMP pin (See fig. 13).
The current sharing control is a high bandwidth control loop allowing current sharing even during load transients.
The current sharing error is affected by the choice of external components; choose precise Rg resistor
(±1% is necessary) to sense the current. The current sharing error is internally dominated by the voltage
offset of Trans conductance differential amplifier; considering a voltage offset equal to 2mV across the
sense resistor, the current reading error is given by the following equation:
∆_-----I_{--R----E---A----D-- = --------------2----m-----V----------------}
I_MAX
R_SENSE ⋅ I_MAX
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