ST7LITE2_06 Datasheet, PDF (18/133 Pages) STMicroelectronics – 8-BIT MICROCONTROLLER WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI

ST7LITE2
DATA EEPROM (Cont’d)
5.4 POWER SAVING MODES
Wait mode
The DATA EEPROM can enter WAIT mode on ex-
ecution of the WFI instruction of the microcontrol-
ler or when the microcontroller enters Active-HALT
mode.The DATA EEPROM will immediately enter
this mode if there is no programming in progress,
otherwise the DATA EEPROM will finish the cycle
and then enter WAIT mode.
Active-Halt mode
Refer to Wait mode.
Halt mode
The DATA EEPROM immediately enters HALT
mode if the microcontroller executes the HALT in-
struction. Therefore the EEPROM will stop the
function in progress, and data may be corrupted.
5.5 ACCESS ERROR HANDLING
If a read access occurs while E2LAT=1, then the
data bus will not be driven.
If a write access occurs while E2LAT=0, then the
data on the bus will not be latched.
If a programming cycle is interrupted (by a RESET
action), the memory data will not be guaranteed.
5.6 Data EEPROM Read-out Protection
The read-out protection is enabled through an op-
tion bit (see section 15.1 on page 122).
When this option is selected, the programs and
data stored in the EEPROM memory are protected
against read-out (including a re-write protection).
In Flash devices, when this protection is removed
by reprogramming the Option Byte, the entire Pro-
gram memory and EEPROM is first automatically
erased.
Note: Both Program Memory and data EEPROM
are protected using the same option bit.
Figure 9. Data EEPROM programming cycle
INTERNAL
PROGRAMMING
VOLTAGE
WRITE OF
DATA LATCHES
READ OPERATION NOT POSSIBLE
ERASE CYCLE
WRITE CYCLE
t_PROG
READ OPERATION POSSIBLE
LAT
PGM
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