M24LR64-R Datasheet, PDF (18/126 Pages) STMicroelectronics – 64 Kbit EEPROM with password protection & dual interface: 400kHz I²C serial bus & ISO 18000-3 mode 1 RF protocol at 13.56MHz

User memory organization
M24LR64-R
Figure 7. Memory sector organization
Sector
Area
0
1 Kbit EEPROM sector
1
1 Kbit EEPROM sector
2
1 Kbit EEPROM sector
3
1 Kbit EEPROM sector
Sector security
status
5 bits
5 bits
5 bits
5 bits
60
1 Kbit EEPROM sector
61
1 Kbit EEPROM sector
62
1 Kbit EEPROM sector
63
1 Kbit EEPROM sector
5 bits
5 bits
5 bits
5 bits
I2C Password
RF Password 1
RF Password 2
RF Password 3
8 bit DSFID
8 bit AFI
64 bit UID
System
System
System
System
System
System
System
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Sector details
The M24LR64-R user memory is divided into 64 sectors. Each sector contains 1024 bits.
The protection scheme is described in Section 4: System memory area.
In RF mode, a sector provides 32 blocks of 32 bits. Each read and write access are done by
block. Read and write block accesses are controlled by a Sector Security Status byte that
defines the access rights to all the 32 blocks contained in the sector. If the sector is not
protected, a Write command updates the complete 32 bits of the selected block.
In I²C mode, a sector provides 128 bytes that can be individually accessed in read and write
modes. When protected by the corresponding I2C_Write_Lock bit, the entire sector is write-
protected. To access the user memory, the device select code used for any I²C command
must have the E2 Chip Enable address at 0.
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Doc ID 15170 Rev 8