AIS3624DQ Datasheet, PDF (18/41 Pages) STMicroelectronics – ultra-low-power digital output 3-axis accelerometer

Digital interfaces
5
Digital interfaces
AIS3624DQ
The registers embedded inside the AIS3624DQ may be accessed through both the I²C and
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I²C interface, the
CS line must be tied high (i.e. connected to Vdd_IO).
Pin name
CS
SCL
SPC
SDA
SDI
SDO
SA0
SDO
Table 8. Serial interface pin description
Pin description
SPI enable
I²C/SPI mode selection (1: I²C mode; 0: SPI enabled)
I²C serial clock (SCL)
SPI serial port clock (SPC)
I²C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
I²C less significant bit of the device address (SA0)
SPI serial data output (SDO)
5.1
I²C serial interface
The AIS3624DQ I²C is a bus slave. The I²C is employed to write data into registers whose
content can also be read back.
The relevant I²C terminology is given in the table below.
Term
Transmitter
Receiver
Master
Slave
Table 9. I²C terminology
Description
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
There are two signals associated with the I²C bus: the serial clock line (SCL) and the Serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines are connected to Vdd_IO through a pull-up resistor
embedded inside the AIS3624DQ. When the bus is free, both the lines are high.
The I²C interface is compliant with fast mode (400 kHz) I²C standards as well as with the
normal mode.
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