STM32L476XX Datasheet, PDF (178/232 Pages) STMicroelectronics – Ultra-low-power with FlexPowerControl

Electrical characteristics
STM32L476xx
Table 79. TIMx⁽¹⁾ characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
t_res(TIM)
f_EXT
Res_TIM
Timer resolution time
-
f_TIMxCLK = 80 MHz
Timer external clock
-
frequency on CH1 to CH4 _{fTIMxCLK = 80 MHz}
Timer resolution
TIMx (except TIM2
and TIM5)
TIM2 and TIM5
1
12.5
0
0
-
-
-
-
f_TIMxCLK/2
40
16
32
t_COUNTER
16-bit counter clock
period
t_{MAX_COUNT}
Maximum possible count
with 32-bit counter
-
f_TIMxCLK = 80 MHz
-
f_TIMxCLK = 80 MHz
1
0.0125
-
-
65536
819.2
65536 × 65536
53.68
1. TIMx_, is used as a general term in which x stands for 1,2,3,4,5,6,7,8,15,16 or 17.
t_TIMxCLK
ns
MHz
MHz
bit
t_TIMxCLK
µs
t_TIMxCLK
s
Table 80. IWDG min/max timeout period at 32 kHz (LSI)⁽¹⁾
Prescaler divider PR[2:0] bits
Min timeout RL[11:0]=
0x000
Max timeout RL[11:0]=
0xFFF
Unit
/4
0
/8
1
0.125
0.250
512
1024
/16
2
/32
3
0.500
1.0
2048
4096
ms
/64
4
2.0
/128
5
4.0
/256
6 or 7
8.0
8192
16384
32768
1. The exact timings still depend on the phasing of the APB interface clock versus the LSI clock so that there
is always a full RC period of uncertainty.
Table 81. WWDG min/max timeout value at 80 MHz (PCLK)
Prescaler
WDGTB
Min timeout value
Max timeout value
Unit
1
0
2
1
4
2
8
3
0.0512
0.1024
0.2048
0.4096
3.2768
6.5536
ms
13.1072
26.2144
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