 English |
|
|
|
|
|
|
|
| STM32L475XX Datasheet, PDF (162/193 Pages) STMicroelectronics – Ultra-low-power ARM Cortex-M4 32-bit MCU+FPU, 100DMIPS, up to 1MB Flash, 128 KB SRAM, USB OTG FS, analog, audio | |||
| |||
| ◁ |
Electrical characteristics
STM32L475xx
SPI characteristics
Unless otherwise specified, the parameters given in Table 83 for SPI are derived from tests
performed under the ambient temperature, fPCLKx frequency and supply voltage conditions
summarized in Table 22: General operating conditions.
⢠Output speed is set to OSPEEDRy[1:0] = 11
⢠Capacitive load C = 30 pF
⢠Measurement points are done at CMOS levels: 0.5 â VDD
Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 83. SPI characteristics(1)
Symbol
Parameter
Conditions
Min
Master mode receiver/full duplex
2.7 < VDD < 3.6 V
Voltage Range 1
Master mode receiver/full duplex
1.71 < VDD < 3.6 V
Voltage Range 1
fSCK
1/tc(SCK)
SPI clock frequency
Master mode transmitter
1.71 < VDD < 3.6 V
Voltage Range 1
Slave mode receiver
1.71 < VDD < 3.6 V
Voltage Range 1
Slave mode transmitter/full duplex
2.7 < VDD < 3.6 V
Voltage Range 1
Slave mode transmitter/full duplex
1.71 < VDD < 3.6 V
Voltage Range 1
Voltage Range 2
tsu(NSS) NSS setup time
Slave mode, SPI prescaler = 2
th(NSS) NSS hold time
Slave mode, SPI prescaler = 2
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
tsu(MI)
tsu(SI)
Data input setup time
Master mode
Slave mode
th(MI)
th(SI)
Data input hold time
Master mode
Slave mode
ta(SO) Data output access time Slave mode
tdis(SO) Data output disable time Slave mode
-
4âTPCLK
2âTPCLK
TPCLK-2
3.5
3
6.5
3
9
9
Typ
-
-
-
TPCLK
-
-
-
-
-
-
Max Unit
24
13
40
MHz
40
26(2)
16(2)
13
-
ns
-
ns
TPCLK+2 ns
-
ns
-
-
ns
-
36
ns
16
ns
162/193
DocID027692 Rev 2
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese