SRIX4K_11 Datasheet, PDF (16/48 Pages) STMicroelectronics – 13.56 MHz short-range contactless memory chip with 4096-bit EEPROM, anticollision and anti-clone functions

Memory mapping
SRIX4K
Figure 15. Write_block update in Reload mode (binary format)
b31
b0
Previous data stored in block 1 ... 1 1 0 1 0 1 1 1 1 1 0 1 1
Data to be written
1 ... 1 1 1 1 0 1 1 0 0 1 1 1 1
New data stored in block
1 ... 1 1 1 1 0 1 1 0 0 1 1 1 1
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4.2
32-bit binary counters
The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to
count down from 2³² (4096 million) to 0. The SRIX4K uses dedicated logic that only allows
the update of a counter if the new value is lower than the previous one. This feature allows
the application to count down by steps of 1 or more. The initial value in Counter 5 is
FFFF FFFEh and is FFFF FFFFh in Counter 6. When the value displayed is 0000 0000h,
the counter is empty and cannot be reloaded. The counter is updated by issuing the
Write_block command to block address 5 or 6, depending on which counter is to be
updated. The Write_block command writes the new 32-bit value to the counter block
address. Figure 17 shows examples of how the counters operate.
The counter programming cycles are protected by automated antitearing logic. This function
allows the counter value to be protected in case of power down within the programming
cycle. In case of power down, the counter value is not updated and the previous value
continues to be stored.
Figure 16. Binary counter (addresses 5 to 6)
Block
Address
5
6
MSb
b31
b24 b23
32-bit block
b16 b15
32-bit binary counter
32-bit binary counter
LSb
b8 b7
b0
Description
Count down
Counter
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