MTC50150 Datasheet, PDF (16/20 Pages) STMicroelectronics – ADSL GATEWAY PROCESSOR

MTC50150
Table 2. MTC50150 Pin list (continued)
Name
Pin
B
Buffer Type
Description
VSS_CORE
F1,
P
N5,
P9,
K10,
L16,
F15,
G10,
B11,
D5,
G9,
H9,
J10,
H10
PVSS3DGZ
0 V, common with VSS_IO
I/O Power Supply Pins (28) [3.3V]
VDD_IO
C3,
P
G2,
J3,
M3,
P3,
R7,
N11,
P14,
K15,
G15,
C14,
D11,
D6
PVDD2DGZ
3.3 V
VSS_IO
H8,
P
H7,
J1,
M4,
K7,
K8,
P11,
J9,
G8,
G7,
J7,
J8,
K9
PVSS3DGZ
0 V, common with VSS_CORE
PLL Digital and Analog Power Supply Pins (4) [1.8V]
VDD_DIG_PLL
A5
P
PVDD1P
1.8V (DVDD)
VSS_DIG_PLL
B5
P
PVSS1P
0 V (not common with VSS_CORE)
(DVSS)
VDD_AN_PLL
A4
P
PVDD1P
1.8V (AVDD)
VSS_AN_PLL
C4
P
PVSS1P
0 V (not common with VSS_CORE)
(AVSS)
Unconnected Pads (0) (all have an internal pull-down resistor)
SWMODE0
-
NA
PDDWDGZ
do not bond; ‘0’ default value, bond to
nearby VDD_IO to get ‘1’ value
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