M95512-A125 Datasheet, PDF (16/44 Pages) STMicroelectronics – Automotive 512-Kbit serial SPI bus EEPROMs with high-speed clock

Instructions
M95512-A125 M95512-A145
4.1
Write Enable (WREN)
The WREN instruction must be decoded by the device before a write instruction (WRITE,
WRSR, WRID or LID).
As shown in Figure 5, to send this instruction to the device, Chip Select (S) is driven low, the
bits of the instruction byte are shifted in (MSB first) on Serial Data Input (D) after what the
Chip Select (S) input is driven high and the WEL bit is set (Status Register bit).
Figure 5. Write Enable (WREN) sequence
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4.2
Write Disable (WRDI)
One way of resetting the WEL bit (in the Status Register) is to send a Write Disable
instruction to the device.
As shown in Figure 6, to send this instruction to the device, Chip Select (S) is driven low,
and the bits of the instruction byte are shifted in (MSB first), on Serial Data Input (D), after
what the Chip Select (S) input is driven high and the WEL bit is reset (Status Register bit).
If a Write cycle is currently in progress, the WRDI instruction is decoded and executed and
the WEL bit is reset to 0 with no effect on the ongoing Write cycle.
Figure 6. Write Disable (WRDI) sequence
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