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LNBH24LQTR Datasheet, PDF (16/25 Pages) STMicroelectronics – Dual LNBS supply and control IC with step-up and I²C interface
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LNBH24 software description
LNBH24L
Table 7. Truth table
PCL TTX TEN LLC VSEL EN TEST4 TEST5
Function
0
0
0
0
0
1
0
1
1
0
1
1
0
0
0
1
0
1
1
0
0
1
0
1
1
0
1
0
1
0
1
0
0 VoRX = 13.3 V, VUP=14.4 V, (VUP-VoRX=1.1 V typ.)
0 VoRX = 18.2 V, VUP=19.3 V, (VUP-VoRX=1.1 V typ.)
0 VoRX = 14.3 V, VUP=15.4 V, (VUP-VoRX=1.1 V typ.)
0 VoRX = 19.2 V, VUP=20.3 V, (VUP-VoRX=1.1 V typ.)
0
Internal 22 kHz controlled by DSQIN pin (only if
TTX=1)
0
Internal 22 kHz tone output on VoTX is always
activated
0
Internal 22 kHz generator disabled, EXTM
modulation enabled
0
1
0
1
1
0
1
0
1
0
1
0
0
VoRX output is ON, VoTX Tone generator output is
OFF
0
VoRX output is ON, VoTX Tone generator output is
ON
0 Pulsed (Dynamic) current limiting is selected
0 Static current limiting is selected
X
X
X
X
X
0
X
X Power block disabled
X = don't care
Values are typical unless otherwise specified
Valid with TTX pin floating
7.4
Diagnostic received data (I²C read mode) for both sections
A/B
The LNBH24L can provide to the MCU master a copy of the diagnostic system register
information via I²C bus in read mode. The read mode is master activated by sending the
chip address with R/W bit set to 1. At the following master generated clocks bits, LNBH24L
issues a byte on the SDA data bus line (MSB transmitted first). At the ninth clock bit the
master can:
● Acknowledge the reception, starting in this way the transmission of another byte from
the LNBH24L
● No acknowledge, stopping the read mode communication
Three bits of the register are read back as a copy of the corresponding write output voltage
register status (LLC, VSEL, EN), two bits convey diagnostic information about the over-
temperature (OTF), output over-load (OLF) and three bit are for internal usage (TEST1-2-3)
and must be disregarded by the MCU software. In normal operation the diagnostic bits are
set to zero, while, if a failure is occurring, the corresponding bit is set to one. At start-up all
the bits are reset to zero.
16/25
Doc ID 16857 Rev 2
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