L9951_10 Datasheet, PDF (16/36 Pages) STMicroelectronics – Rear door actuator driver

Electrical specifications
L9951 / L9951XP
Table 17. EN, CSN timing⁽¹⁾
Symbol
Parameter
Minimum EN high before
t_{EN_CSN_LO} sending first SPI frame, i.e.
CSN going low
t_{CSN_HI,min}
Minimum CSN HI time
between two SPI frames
1. See Figure 7
Test condition
Min. Typ. Max. Unit
Transfer of SPI-command
to input register
Transfer of SPI-command
to input register
20 50 µs
2
4
µs
Figure 3. SPI - transfer timing diagram
CSN
CSN high to low: DO enabled
time
CLK
DI
DO
e.g.OUT1
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
DI: data will be accepted on the rising edge of CLK signal
actual data
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
DO: data will change on the falling edge of CLK signal
status information
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
fault bit
CSN low to high: actual data is
transfered to output power switches
old data
01
time
new data
01
time
0
1
time
actual data
time
Figure 4. SPI - input timing
CSN
CLK
DI
t _{set CSN}
t _CLKH
t_{set CLK}
t_{set DI} t_{hold DI}
t _CLKL
Valid
Valid
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
16/36
Doc ID 14173 Rev 8